Hi @Ivan ,
That was a good call, and I am now further along using the default Windows version. I see an LED blink, and I can tell that my target is getting put into reset. However, it errors out on trying to read the device ID:
D:\Downloads\openocd-20211118\OpenOCD-20211118-0.11.0\bin>openocd.exe -f interface/cmsis-dap.cfg -f target/S6E1C32B0AGP20000.cfg
Open On-Chip Debugger 0.11.0 (2021-11-18) [GitHub - sysprogs/openocd: OpenOCD shipped with VisualGDB. Built with CMake.]
Licensed under GNU GPL v2
libusb1 09e75e98b4d9ea7909e8837b7a3f00dda4589dc3
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport “swd”. To override use 'transport select '.
adapter speed: 1000 kHz
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : CMSIS-DAP: SWD supported
Info : CMSIS-DAP: FW Version = 1.2
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 0 TDI = 0 TDO = 0 nTRST = 1 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : clock speed 1000 kHz
Error: Error connecting DP: cannot read IDR
I know this target has a GPIO entry sequence where you’re sending a special JTAG-2-SWD command sequence on SWDIO/SWCLK before you can truly utilize the SW-DP. Wasn’t sure if that was standard on all ARM MCU’s, or if this is something that I need to handle in OpenOCD settings, or something I need to add to the firmware.